1. Field of the Invention
The present invention relates to a temperature sensor circuit, and in particular, to a multi-channel temperature sensor having a single negative input terminal configured to receive input from multiple remote temperature-sensing diodes.
2. Description of the Related Art
When operated at a constant current, the voltage (V.sub.for) of a forward-biased P/N diode exhibits a negative temperature coefficient of about -2 mV/.degree. C. This property can be utilized to detect temperature. Unfortunately, the absolute value of V.sub.for varies according to diode composition and hence the process conditions under which the diode was fabricated. One approach to overcome such process-based variation in V.sub.for is to calibrate the current supplied across the P/N junction to match the variation in V.sub.for exhibited by a particular diode. However, such a calibration of individual current supplies is impractical for mass produced devices. Another approach is to detect a change in forward-biased diode voltage (.DELTA.V.sub.for) for two different applied currents, 1X and NX, where NX is an integer multiple of 1X. Specifically: ##EQU1##
The premise of this approach is the principle that any uncertainty in diode behavior introduced by process variation is eliminated (i.e., cancelled out) by detecting a voltage change for two different currents flowing across the same diode.
Accordingly, FIG. 1 shows a schematic diagram of a conventional temperature sensor circuit utilizing this principle to detect ambient temperature. Temperature sensor circuit 100 includes remote diode 102 positioned in remote device 104 and connected with temperature sensor 106 through output line 108 at positive data pin (DxP) and through input line 110 at negative data pin (DxN). While FIG. 1 depicts remote diode 102 as a simple diode remote diode 102 can also take the form of the forward-biased emitter-base P/N junction of a PNP or NPN bipolar transistor.
Temperature sensor 106 also includes variable current supply 112 configured to communicate a current to positive data pin DxP. The output from variable current supply 112 is varied between a base current (1X) and an integer multiple (NX) of the base current, as controlled by logic block 116.
Current output from the positive data pin DxP is communicated through output line 108 to remote diode 102. Current flows across remote diode 102, and is returned back through input line 110 to temperature sensor 106 at the negative data pin DxN.
Temperature sensor 106 includes analog-to-digital (ND) converter 114 having first input terminal 114a, second input terminal 114b, and output terminal 114c. A first current is flowed into remote diode 102, and first input terminal 114a experiences a first voltage corresponding to the flow of this first current into remote diode 102.
A/D converter 114 receives, at second input terminal 114b, a second voltage corresponding to the current flowed across remote diode 102. This second voltage experienced at the second input terminal 114b is a function of (i.e., depends on) the potential drop across remote diode 102. A/D converter 114 samples the difference between the first and second voltages, converts this difference into a digital signal, and communicates this digital signal to logic block 116.
Precise operation of the conventional temperature sensor circuit of FIG. 1 is explained in conjunction with FIGS. 1A-1B. FIG. 1A is a detailed view of the circuitry at the DxP pin and DxN pin of temperature sensor 106. FIG. 1B is a detailed view of the circuitry of A/D converter 114 of temperature sensor 106.
First constant current source 118 provides a base current 1X along first force line 120 to the DxP pin. First switch 122 selectively connects second constant current source 124 to first force line 120. Second constant current source 124 provides a supplemental current (N-1)X constituting an integer multiple of the base current 1X output by first constant current source 118. The currents output by the first and second constant current sources 118 and 124 will vary somewhat with temperature, but the ratio of these currents will retain the integer relationship described herein.
First switch 122 is controlled by logic block 116. Initially, first switch 122 is deactivated, and first constant current source 118 alone communicates base current 1X to the DxP pin. The base current 1X flows out of the DxP pin, through output line 108, and across remote diode 102. The resulting voltage on the DxP pin is communicated along first sense line 126 to first input terminal 114a of A/D converter 114.
Current flowing across remote diode 102 is conveyed through input line 110 back to temperature sensor 106 at the DxN pin. This current, then, flows through second force line 128, exhibiting a parasitic resistance represented by resistor 130 in series with diode 132, into ground. Third current supply 170 is also in electrical communication with second force line 128. The resulting voltage on the DxN pin is communicated to second input terminal 114b of AID converter 114 along second sense line 134.
The voltage difference between the DxP and DxN pins represents the voltage drop (V.sub.for1) across forward-biased remote diode 102 at the base current 1X. This voltage difference is sampled by A/D converter 114, as shown in FIG. 1B.
A/D converter 114 includes voltage reference 148 in electrical communication with non-inverting input node 150a of operational amplifier 150, and also in electrical communication with first plate 152a of sampling capacitor 152 through second switch 154. First input terminal 114a of A/D converter 114 is in electrical communication with first plate 152a of sampling capacitor 152 through third switch 156. One skilled in the art will recognize that A/D converter 114 is representative of a variety of analog-to-digital converters suitable for use in temperature sensor circuits.
Second input terminal 114b of A/D converter 114 is in electrical communication with second plate 152b of sampling capacitor 152 through fourth switch 158. Second plate 152b of sampling capacitor 152 is in electrical communication with inverting input node 150b of operational amplifier 150 through fifth switch 160.
First plate 162a of feedback capacitor 162 is in electrical communication with inverting input node 150b of operational amplifier 150. Second plate 162b of feedback capacitor 162 is in electrical communication with output node 150c of operational amplifier 150.
The A/D converter 114 depicted in FIG. 1B also includes a parasitic capacitor 164 in electrical communication with second plate 152b of sampling capacitor 152. Parasitic capacitor 164 represents the parasitic capacitance arising due to existence of the fourth and fifth switches 158 and 160. In reality, these switches are MOS transistors that experience some form of parasitic capacitance. The charge retained as a result of this parasitic capacitance must be considered during operation of A/D converter 114, and is thus represented as parasitic capacitor 164.
During operation, A/D converter 114 samples the difference in voltage across a remote diode as follows. At an initial phase M.sub.1, third switch 156 and fourth switch 158 are closed, while second switch 154 and fifth switch 160 are open. As a result of this configuration, voltage on the DxP pin is transferred to first plate 152a of sampling capacitor 152, and voltage on the DxN pin is transferred to second plate 152b of sampling capacitor 152. Thus, in the first phase M.sub.1, charge (Q.sub.S) stored on sampling capacitor 152 is given by Equation (II) as: EQU Q.sub.S =C.sub.S (V.sub.DxP -V.sub.DxN), (II)
where
Q.sub.S =charge stored on sampling capacitor 152; PA1 C.sub.S =capacitance of sampling capacitor 152; PA1 V.sub.DxP =voltage at the DxP pin; and PA1 V.sub.DxN =voltage at the DxN pin. PA1 Q.sub.P =charge stored on parasitic capacitor 164; PA1 C.sub.P =capacitance of parasitic capacitor 164; and PA1 V.sub.DxN =voltage at the DxN pin. PA1 Q.sub.FB =charge on feedback capacitor 162; PA1 V.sub.DxP =voltage on the DxP pin during phase M.sub.1 ; PA1 V.sub.DxN =voltage on the DxN pin during phase M.sub.1 ; PA1 C.sub.S =capacitance of sampling capacitor 152; PA1 C.sub.P =capacitance of parasitic capacitor 164; and PA1 V.sub.REF =reference voltage output by voltage reference 148. PA1 Q.sub.P =charge on parasitic capacitor 164; PA1 C.sub.P =capacitance of parasitic capacitor 164; and PA1 V.sub.REF =reference voltage output by voltage reference 148.
During phase M.sub.1, charge (Q.sub.P) also accumulates on parasitic capacitor 164 pursuant to Equation (III): EQU Q.sub.P =C.sub.P V.sub.DxN, (III)
where
In reality, charge may have already accumulated on all the capacitors from earlier operation (i.e., earlier clock cycles). However, for purposes of simplicity, in this example the initial capacitance of the capacitors are assumed to be zero.
In the next phase M.sub.2, third switch 156 and fourth switch 158 are opened, while second switch 154 and fifth switch 160 are closed. As a result of this configuration, the charge on sampling capacitor 152, less the charge retained by parasitic capacitor 164, is transferred to feedback capacitor 162. This is expressed in Equation (IV): EQU Q.sub.FB =Q.sub.S -Q.sub.P =C.sub.S (V.sub.DxP -V.sub.DxN)-C.sub.P (V.sub.REF -V.sub.DxN), (IV)
where
Because second switch 154 is closed at phase M.sub.2 the charge remaining on parasitic capacitor 164 is shown in Equation (V) below: EQU Q.sub.P =C.sub.P V.sub.REF, (V)
where
Per Coulomb's law, V=Q/C. Therefore, Equation (IV) can be rewritten as: ##EQU2##
It is important to recognize that the second term of Equation VI includes as a variable a quantity other than V.sub.DxP -V.sub.DxN, specifically the quantity V.sub.REF -V.sub.DxN. Because of this second term, fluctuation in V.sub.DxN can result in a corresponding change in the sampled voltage V.sub.FB on feedback capacitor 162. However, stabilizing V.sub.DxN can result in the second term of Equation VI representing a simple offset that can be anticipated and compensated for.
Once the voltage corresponding to V.sub.for1 has been sampled on feedback capacitor 162, this voltage is then transferred to comparator and logic circuitry 180 for conversion into digital form. The digitized signal is output on output terminal 114c and then communicated to logic block 116. After this operation is repeated a suitable number of times (i.e., a suitable number of clock cycles), first switch 122 is activated.
First constant current source 118 provides base current 1X to the DxP pin and second constant current source 124 provides supplemental current (N-1)X to the DxP pin, such that the DxP pin receives a total current of NX. The corresponding output voltage on the DxP pin is communicated along first sense line 126 to first input terminal 114 a of A/D converter 114.
The total current NX flows out of the DxP pin through output line 108 and across remote diode 102. Current flowing out of remote diode 102 is conveyed through input line 110 back to temperature sensor 106 at the DxN pin. This current then flows through second force line 128, exhibiting a parasitic resistance represented by resistor 130 in series with diode 132, into ground. The corresponding input voltage on the DxN pin is communicated along second sense line 134 to second input terminal 114b of A/D converter 114.
The difference between voltage at the DxP pin and the voltage at the DxN pin represents the voltage drop V.sub.for2 across forward-biased remote diode 102 at the elevated current NX. Therefore, A/D converter 114 samples this voltage drop and subsequently generates on output terminal 114c a second digital signal corresponding to V.sub.for2, in the manner previously described in connection with FIG. 1B for V.sub.for1.
This second digital signal is fed to logic block 116, where it is compared with the previously stored V.sub.for1 to determine the charged forward-biased voltage .DELTA.V.sub.for =V.sub.for2 -V.sub.for1, and hence the temperature at remote diode 102 and remote device 104 pursuant to Equation (I).
While satisfactory for some applications, conventional temperature sensor circuits, such as the conventional temperature circuit shown in FIGS. 1 and 1A and those employing any known analog-to-digital converter, have several disadvantages.
First, conventional temperature sensor circuits are sensitive to noise. As described in relation to the specific example of FIGS. 1 and 1A and in connection with the second term of Equation (VI), fluctuation of voltage at the DxN pin can substantially affect the accuracy of the sampled signal communicated in the logic block. Thus, where the remote diode is positioned in a noisy environment (e.g., near an active microprocessor), the resulting voltage fluctuation at the DxN pin could adversely affect the accuracy of the digital signal communicated to the logic block.
Second, a temperature sensor of the conventional circuit shown in FIG. 1 is limited to sensing temperature at a single remote location. However, in many applications, it is desirable to monitor ambient temperature at a plurality of remote locations (i.e., monitoring temperature at a CPU, battery and disk drive of a laptop computer).
Third, the pin count of conventional temperature sensors adapted to monitor temperature at multiple remote locations is large due to the multiplicity of positive and negative data pins. The same number of negative data pins is required as the number of positive data pins in such a conventional temperature sensor.
For example, FIG. 2 illustrates such a sensor adapted to monitor temperature at three remote locations. Temperature sensor circuit 200 features temperature sensor 206 with three positive data pins DxP.sub.1-3 and three associated negative data pins DxN.sub.1-3. Current output from first DxP.sub.1 pin is communicated through first output line 208 to first diode 202 located in first remote device 204. Current flows across first diode 202 and is returned back through first input line 210 to temperature sensor 206 at first negative data pin DxN.sub.1. Similarly, current output from the second DxP.sub.2 pin and the third DxP.sub.3 pin is, respectively, communicated through its own output line (230 and 238) to associated diode (232 and 240) located in an associated remote device (234 and 242). Thus, current flows across associated diode (232 or 240) and is returned back through associated input line (236 or 244) to temperature sensor 206 at second negative data pin DxN.sub.2 and at third negative data pin DxN.sub.3, respectively. Temperature sensor 206 includes two multiplexers, both controlled by logic block 216. First multiplexer 250 selectively connects the output of variable current supply 212 to any desired positive data pin, while second multiplexer 252 selectively connects second A/D input terminal 214b of A/D converter 214 to any desired negative data pin. Selective activation of first and second switches 250 and 252 permits A/D converter 214 to measure .DELTA.V.sub.for at currents 1X and NX for any desired diode.
Therefore, there is still a need in the art for a multi-channel remote diode temperature sensor with reduced pin count and sensitivity to noise.